APPENDIX A: ALTAIR 8800 INSTRUCTION SET

Definitions:
DDD Destination Register
SSS Source Register
rp Register Pair
Register Designations
Register (SSS or DDD) Bit Pattern
B 000
C 001
D 010
E 011
H 100
L 101
Memory 110
Accumulator 111
Register Designations
Register Pair Bit Pattern
B and C 00
D and E 01
H and L 10
SP 11

A. COMMAND INSTRUCTIONS

1. Input/Output Instructions

Mnemonic Bytes Cycles Binary Code Octal Code
IN 2 3 11 011 011 333
OUT 2 3 11 010 011 323

2. Interrupt Instructions

Mnemonic Bytes Cycles Binary Code Octal Code
EI 1 1 11 111 011 373
DI 1 1 11 110 011 363
HLT 1 1 01 110 110 166
RST 1 3 11 (exp) 111 3(exp)7

3. Carry Bit Instructions

Mnemonic Bytes Cycles Binary Code Octal Code
CMC 1 1 00 111 111 077
STC 1 1 00 110 111 067

4. No Operation Instruction

Mnemonic Bytes Cycles Binary Code Octal Code
NOP 1 1 00 000 000 000

B. SINGLE REGISTER INSTRUCTIONS

Mnemonic Bytes Cycles Binary Code Octal Code
INR 1 3 00 (DDD) 100 0(DDD)4
DCR 1 3 00 (DDD) 101 0(DDD)5
CMA 1 1 00 101 111 057
DAA 1 1 00 100 111 047

C. REGISTER PAIR INSTRUCTIONS

Mnemonic Bytes Cycles Binary Code Octal Code
PUSH 1 3 11 (rp)0 101 3(rp)5
POP 1 3 11 (rp)0 001 3(rp)1
DAD 1 3 00 (rp)1 001 0(rp)1
INX 1 1 00 (rp)O 011 0(rp)3 *
DCX 1 1 00 (rp)1 011 0(rp)3 *
XCHG 1 1 11 101 011 353
XTHL 1 5 11 100 011 343
SPHL 1 1 11 111 001 371

D. ROTATE ACCUMULATOR INSTRUCTIONS

Mnemonic Bytes Cycles Binary Code Octal Code
RLC 1 1 00 000 111 007
RRC 1 1 00 001 111 017
RAL 1 1 00 010 111 027
RAR 1 1 00 011 111 037

E. DATA TRANSFER INSTRUCTIONS

1. Data Transfer Instructions

Mnemonic Bytes Cycles Binary Code Octal Code
MOV 1 1 or 2 01 (DDD) (SSS) 1(DDD)(SSS)
STAX 1 2 00 0(X)0 010* 0(X)2
LDAX 1 2 00 0(X)1 010* 0(X)2

Note

Register Pair B and C – 0 at X

Register Pair D and E – 1 at X

2. Register/Memory to Accumulator Transfers

Mnemonic Bytes Cycles Binary Code Octal Code
ADD 1 1 10 000 (SSS) 20(SSS)
ADC 1 1 10 001 (SSS) 21(SSS)
SUB 1 1 10 010 (SSS) 22(SSS)
SBB 1 1 10 011 (SSS) 23(SSS)
ANA 1 1 10 100 (SSS) 24(SSS)
XRA 1 1 10 101 (SSS) 25(SSS)
ORA 1 1 10 110 (SSS) 26(SSS)
CMP 1 1 10 111 (SSS) 27(SSS)

3. Direct Addressing Instructions

Mnemonic Bytes Cycles Binary Code Octal Code
STA 3 4 00 110 010 062
LDA 3 4 00 111 010 072
SHLD 3 5 00 100 010 042
LHLD 3 5 00 101 010 052

F. IMMEDIATE INSTRUCTIONS

Mnemonic Bytes Cycles Binary Code Octal Code
LXI 3 3 00 (rp)0 001 O(rp)1
MVI 2 2 or 3 00 (SSS) 110 0(SSS)6
ADI 2 2 11 000 110 306
ACI 2 2 11 001 110 316
SUI 2 2 11 010 110 326
SBI 2 2 11 011 110 336
ANI 2 2 11 100 110 346
XRI 2 2 11 101 110 356
ORI 2 2 11 110 110 366
CPI 2 3 11 111 110 376

G. BRANCHING INSTRUCTIONS

1. Jump Instructions

Mnemonic Bytes Cycles Binary Code Octal Code
PCHL 1 1 11 101 001 351
JMP 3 3 11 000 011 303
JC 3 3 11 011 010 332
JNC 3 3 11 010 010 322
JZ 3 3 11 001 010 312
JNZ 3 3 11 000 010 302
JM 3 3 11 111 010 372
JP 3 3 11 110 010 362
JPE 3 3 11 101 010 352
JPO 3 3 11 100 010 342

2. Call Instructions

Mnemonic Bytes Cycles Binary Code Octal Code
CALL 3 5 11 001 101 315
CC 3 3 or 5 11 011 100 334
CNC 3 3 or 5 11 010 100 324
CZ 3 3 or 5 11 001 100 314
CNZ 3 3 or 5 11 000 100 304
CM 3 3 or 5 11 111 100 374
CP 3 3 or 5 11 110 100 364
CPE 3 3 or 5 11 101 100 354
CPO 3 3 or 5 11 100 100 344

3. Return Instructions

Mnemonic Bytes Cycles Binary Code Octal Code
RET 1 3 11 001 001 311
RC 1 1 or 3 11 011 000 330
RNC 1 1 or 3 11 010 000 320
RZ 1 1 or 3 11 001 000 310
RNZ 1 1 or 3 11 000 000 300
RM 1 1 or 3 11 111 000 370
RP 1 1 or 3 11 110 000 360
RPE 1 1 or 3 11 101 000 350
RPO 1 1 or 3 11 100 000 340